PD3 Tecnologia em Network

IP Cores

The PD3 Tecnologia develops applications for Programmable Logic, using language VHDL - Very High Speed Integrated Circuit (VHSIC) the Hardware Description Language. Some of these applications are offered as IP Cores (Intellectual Property Cores) for the market of Telecommunications and Data Communication. The IP Cores are supplied with all the documentation and practical training to the receiving companies quickly use them in its proper developments.

The currently IP Cores available are:

1 - E1 FRAMER
Module that works as framer E1 of 2M bit/s, conform to the norm G.703 and G.704.

2 - E2 MULTIPLEX
Module that works as a Multiplexer of 4 E1 channels, generating a frame of 8 Mbit/s.

3 - E3 MULTIPLEX
Module that works as a Multiplexer of 16 E1 channels, generating a frame of 34 Mbit/s.

4 - CROSS-CONNECT MATRIX
Module that works as a Cross-Connection Matrix of 16 x 16 E1s, making possible to arrange any Time-Slot of 64kbit/s among any 16 E1s channels.

5 - VOICE FRAMER
Module that works as a framer of voice, sharing channel PCM of voice with the signaling and synchronism channels.

6 - GROOMING
Module that works as a grooming, which one has the main function to carry Time-Slots of voice and data in one same stream of E1 Tributary, inserting and removing the pertinent information of the voice's channels.

7 - BERT
Module that works as BERT function - Bit Error Rate Tester, generating and detecting standards patterns for data-communication equipment.

8 - DROP & INSERT
Module that works as Drop & Insert, which has the main function to insert and to remove Time-Slots of data in one same stream of E1 Tributary.